More-than-Moore, System in package

The market demand for increased performance, smaller size, lower power and lower cost cannot be met with conventional packaging and interconnect technologies (ITRS Roadmap, SIP white paper). There are limitations in thermal management, interconnect density, bandwidth and signal integrity that cannot be addressed with conventional technology. System in Package technology is perhaps the most important technology to address these limitations. Therefore new interconnect technologies for both power supply as well as heat removal are required. Size scaling of transistors and increase of the clock rate according to Moore’s law and the semiconductor industry association (SIA) roadmap led to an explosion in power-density for logic circuits, communication devices, and memory. Although the energy per operation is still decreasing, cramming more and more transistors to the same area increases the density of dissipated power to an unacceptable level that threatens the current fast rate of progress of the industry. Still today, even after many attempts to cut down on thermal resistance, the thermal interface materials still represent, depending on the power map and system architecture, around 1/10 to 1/3 of the total thermal resistance in power-SiP or microprocessor systems, quite apart from the fact that they also represent a severe thermo-mechanical reliability problem. So thermal and thermo-mechanical issues always have to be addressed in combination.

Power electronics for automotive:

Automotive applications for power electronics is increasing rapidly due to the demand for hybrid and future fuel-cell powered vehicles. The power electronic systems are not only required for driving the vehicle but are also used to interface energy storage components and to supply high power auxiliary systems such as active suspension, electric valves and air conditioning units. The automotive industry has specific requirements for its power electronic systems such as a compact design, high reliability, long life time and an extremely low cost to power ratio. The systems are further required to operate over a wide ambient temperature range and with liquid cooling temperatures of typically 105 °C. The demand for high power modules remains high and will increase in the future as there is a growing market for electric and hybrid cars There is a continuing trend to miniaturisation of power ICs (IGBT, MOSFETs) which leads to higher power and thermal density. In power modules, many MOSFETs or IGBTs are aligned side by side to handle the high thermal and power density. Costs rise due to designing larger modules. Power packages and power modules need new packaging technologies to cope with these challenges. Additionally, green technology is required. To replace the high melting point solders used for die attach and containing Pb, which are still allowed in those packages as a part of the exemption lists of the RoHS directive (Restriction on the Use of certain Hazardous Substances) and of the ELV directive (End-of-Life Vehicles). Through NANOTHERM, cost effective solutions with green technology (e.g. sinter adhesive) will be achieved to cover the legal demands (RoHS complaint), to increase reliability compared to soft solder, and even to find new solutions for effective cooling. Green technology concepts can be introduced in large scale on power packages and modules (MOSFET on Cu/DCB substrate).

Power-electronics for industrial applications

Chip Innovation leads to an increase of current-density by a factor 3 in less than one decade. Furthermore, the package must be able to handle switching powers in the range of 100 W/mm2. For that reason, package capabilities have to be extended: new die-attach-systems and new interconnects on chip-topside have to be developed. New and cost-effective package materials and production concepts are also required for reasons of competitiveness. A new requirement follows the trend of enhanced cooling concepts for multi-chip modules, i.e. cost-effective co-packaging of logic and power (high current capability) chips in one package, sometimes even taking recourse to 3D packaging architectures for smallest form factor. This means that packaging must be capable to follow further system miniaturization (trend to embedding technologies, heterogeneous integration and power-SiP). Therefore, as is also true for general SiP, also here progress and future competitiveness is strongly materials and technology driven. There is a high need for thermally and thermo-mechanically enhanced materials and substrates as well as technologies that ensure reliable and compatible processes for this multi-materials, multi-technology, multi-interface, multi-disciplinary, multi-functional as well as multi-scale concept.

Avionics Sector

Next generation Global Navigation Satellite System are facing tremendous heat removal challenges of 100 W/cm2 hot spots with 20 % of the thermal resistance currently being represented by the TIM. The existing cooling techniques for avionics and aircraft equipment are: natural convection, forced convection (Direct Air Flow Through), forced convection with internal conduction, pure conduction, two-phase-change systems (i.e. heat pipes) and liquid cooling. The general approach in literature shows that the transported power, q, can be increased by reducing the overall thermal resistance Rtot which is the result of a resistance network between the power source and the external cooling medium. In a usual approach, one would use a heat sink to cool down the chip under 100°C, but this would increase the size and weight (estimated increase of 30%) of the equipment which are critical items on the aircrafts, and would also have a negative impact on aircraft consumption. Therefore the only possible approach is to drastically increase the TIM performance.

Solid state lighting

Concerning the demands on LED technology developments, it is expected that the power density on die level for high power LED increases to levels to 1000 W/cm2 according to the 2002 OIDA roadmap. In addition, lifetime requirements increase tremendously (from 20 khr to beyond 100 khr). The thermal performance of current LED devices is a strong limiting factor in achieving high operating temperatures and high power densities, which are essential requirements for future LEDs. Although the conversion efficiency is increasing, the net result is an increasing heat flux density. This heat load has to be transferred from die level to the environment through a number of layers, which function is in principle to reduce the heat flux density to the level of natural convection heat transfer. In current LED systems this is typical a reduction of a factor 1000 in heat flux density. It is clear that the thermal path from die to heat transferring surface has to be efficient, i.e. minimum thermal resistance and maximum heat spreading. At the same time the various layers in the thermal path introduce thermal interfaces with a risk of thermal contact resistances. Thermally enhanced substrates with optimized design, thermal interface materials and Chip-on-Board (COB) layouts made with enhanced materials with high bulk thermal conductivity and low thermal resistance at the interfaces provide a way to meet these high demands. Currently the lighting industry is facing a paradigm shift towards SSL. LEDs are a completely different light source compared to today’s offerings. SSL based light sources will boost the efficiency of the system typically by a factor 5. This will lead to tremendous energy consumption reductions and consequently reduced CO2 emissions. The development of highly reliable SSL components will contribute to the leading position of Europe for energy efficient lighting solutions. LEDs have a high energy efficiency compared to incandescent lights. The energy consumption of 1 LED lamp is 1/25th of the consumption of an incandescent lamp and 2/5th of that of a Compact Fluorescent lamp (CFL). Moreover a LED has a long lifetime, creating less environmental impact. As approximately 20% of all electricity generated goes into lighting applications, a large global saving will be obtained by switching to LED lighting.

Die attach and thermal interface materials

Current die attach and thermal interface materials, being metallic solders or adhesives, reach their limits when exposed to high power densities. Existing Pb-free solders do not sufficiently withstand thermo-mechanical stresses at temperatures higher than 150°C and Pb-based solders are harmful for the environment. Conventional adhesives lack thermal conductivity to dissipate the generated heat properly. Therefore enhanced materials are needed for high power density packages, which allow an outstanding bulk heat conduction and low interface resistance. New functionalized materials with nano-scaled adhesion mechanisms like carbon nanotubes or sinter adhesives might provide the necessary potential to meet this challenge. It is clear that classical empirical routes for improving the thermal performance of integrated circuits, packages, and systems fail in view of these huge challenges. There is a need for a holistic approach that tackles heat transfer from the individual nanometer sized junctions to the macroscopic meter-sized rack or even to a datacenter which can have sizes of up to hundred meters. The field urgently requires a much higher level of understanding based on world leading modelling but also a much better feedback for the engineer as a result of improved instrumentation. Future design of integrated systems also requires a much tighter interaction between different disciplines than before. Important new points of contacts are electro-thermal-mechanical co-design, chip-package interaction and validation of models by experiment.